1. Field of the Invention
The present invention relates to differential-signal output circuits, and more particularly to a differential-signal output circuit with pre-charging functionality for a timing controller of a display device.
2. Description of the Prior Art
Liquid crystal display (LCD) devices are flat panel displays characterized by thin appearance, low radiation and low power consumption. Hence, LCD devices have gradually replaced traditional cathode ray tube (CRT) displays, and been widely applied in various electronic products such as notebook computers, personal digital assistants (PDAs), flat panel televisions, or mobile phones. An LCD device requires a driving system to drive an LCD panel, and the driving system usually includes a timing controller, a gate driver, and a source driver. The timing controller adopts differential signaling interfaces to transfer signals (data, control, clock signals) with the source driver and transfers the signals in a bus manner. Common differential signaling interfaces used in an LCD device include reduced swing differential signal (RSDS) interfaces, low voltage differential signal (LVDS) interfaces, and mini low voltage differential signal (mini-LVDS) interfaces, etc. To output differential signals, the timing controller utilizes a differential-signal output circuit outputting currents to terminal resistors inside the source drive by transmission lines. Voltage differences with different polarities are thereby generated across the terminal resistors, and are so called differential signals.
With advances of the LCD generation, the requirements for LCD sizes step into large scales and the resolution required is higher and higher. As a result, it is unavoidable to enhance operating speed of internal circuits of the LCD. A charging rate of a typical differential-signal output circuit appears insufficient. If the typical differential-signal output circuit is used in a large-size LCD, charging time of the load circuit may be too long to maintain correct data reception in the source driver. Therefore, to apply to large-size, high-speed LCD devices, U.S. Pat. No. 6,281,715, entitled “Low Voltage Differential Signal Driver with Pre-Emphasis Circuit”, discloses a RSDS output circuit including a typical differential-signal output circuit, a pre-charging circuit and a bias circuit. The RSDS output circuit is used for pre-charging the load resistors in the source driver so as to enhance charging efficiency. Please refer to FIG. 1, which is a schematic diagram of the RSDS output circuit according to U.S. Pat. No. 6,281,715. In FIG. 1, the pre-charging circuit includes inverters IV1-IV5 and an exclusive-NOR gate XNOR, and thereby utilizes the inverters IV2, IV3 and IV4 to delay an input signal IN, so as to generate a pre-charging pulse signal IXNOR to control transistors M27 and M25. During transitions of transistors M21-M24, the transistors M27 and M25 switch on so that the pre-charging current ID2 is outputted to the load circuit RL. In addition, U.S. Pat. No. 6,281,715 further discloses a RSDS output circuit shown in FIG. 2. The RSDS output circuit utilizes transistors M61-M64 to control a pre-charging current ID2 to enhancing pre-charging efficiency. In this patent, the RSDS output circuits both adopt the inverters to delay the input signal IN for an expected time. Thus, the pre-charging duration depends on the number of the inverters.
However, due to inverter manufacturing variation, the inverters in the RSDS output circuit may be slightly different in size. In this situation, the input signal IN may be delayed for different time when passing through each inverter, affecting the pre-charging duration. Beside, when the RSDS output circuit operates at different clock rates, inconsistent delay pulse-width ratios cause difficult delay control for the differential-signal output circuit. In this situation, the pre-charging current may pre-charge the load circuit at the wrong time.